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  ?1 CXA3117AN e97220a8z if amplifier for m-ary fsk pagers description the CXA3117AN is a low current consumption fm if amplifier which employs the newest bipolar process. it is suitable for m-ary fsk pagers. features low current consumption: 1.1ma (typ. at v cc = 1.4v) low voltage operation: v cc = 1.1 to 4.0v small package 24-pin ssop second mixer and oscillator needless of if decoupling capacitor reference power supply for operational amplifier and comparator bit rate filter with variable cut-off misoperation prevention function for continuous data rssi function if input, v cc standard quick charge by the detector output sense method applications m-ary fsk pagers double conversion pagers block diagram and pin configuration structure bipolar silicon monolithic ic absolute maximum ratings supply voltage v cc 7.0 v operating temperature topr ?0 to +75 ? storage temperature tstg ?5 to +150 ? allowable power dissipation p d 417 mw operating condition supply voltage v cc 1.1 to 4.0 v sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. 24 pin ssop (plastic) mix in gnd reg out reg cont lva out nrz out charge b.s. audio l.c. out chg off rssi osc in osc out mix out v cc if in th cont fsk ref quad c1 c2 c3 fil sw osc if_lim filter mix quad_det level comp reg rssi charge gnd lva 13 14 15 16 17 18 19 20 21 22 23 24 2 3 4 5 6 7 8 9 10 11 12 1
? 2 CXA3117AN pin description pin no. 1 1.4v 0.7v 1.3v 1.4v 0.2v osc in connects the external parts of crystal oscillator circuit. a capacitor and crystal oscillator are connected to these pins and v cc . mixer output. connect a 455khz ceramic filter between this pin and if in. if limiter amplifier input. determines the level comparator threshold value. threshold value can be adjusted by inserting the resistor between pin 6 and v cc . normally, short to v cc . connects the capacitor that determines the low cut-off frequency for the entire system. power supply. osc out mix out v cc if in th cont fsk ref 2 3 4 5 6 7 symbol pin voltage equivalent circuit description 2 1 g n d v c c 3 0 0 1 5 k 1 5 k 7 2 g n d v c c 3 1 . 5 k g n d v c c 2 0 k 5 1 . 5 k 1 . 5 k 2 0 k g n d v c c 6 2 5 k g n d v c c 7 2 7
? 3 CXA3117AN pin no. 8 1.4v quad 9 10 11 0.2v c1 c2 c3 12 fil sw 13 0.1v rssi 14 chg off connects the phase shifter of fm detector circuit. connects the capacitor that determines the lpf cut-off. switches the lpf cut-off. cut-off is decreased by setting this pin high. (applied voltage range: ?.5v to +7.0v) rssi circuit output. sets off the quick charge circuit current. the charge current is off by setting pin 18 low and pin 14 high. symbol pin voltage equivalent circuit description 8 g n d v c c 2 2 k 2 0 k 2 0 p g n d v c c 9 1 0 1 1 3 5 k 5 0 k g n d 1 4 0 k 2 0 k 7 2 1 2 g n d v c c 7 k 7 k 1 3 7 0 k g n d 1 0 0 k 2 0 k 7 2 1 4
? 4 CXA3117AN pin no. 15 19 20 l.c. out nrz out lva out level comparator, nrz comparator and lva comparator outputs. they are open collectors. (applied voltage range: ?.5v to +7.0v) 18 charge controls the speed of the quick charge circuit. set this pin high to execute the quick charge. (applied voltage range: ?.5v to +7.0v) 21 reg cont output for internal constant-voltage source amplifier. connect the base of pnp transistor. (current capacity: 100 a) 22 1.0v reg out constant-voltage source output. controlled to maintain 1.0v. 23 gnd ground 17 b.s. controls the battery saving. setting this pin low suspends the operation of ic. (applied voltage range: ?.5v to +7.0v) symbol pin voltage equivalent circuit description g n d 7 2 1 5 1 9 2 0 g n d 1 4 0 k 2 0 k 7 2 1 7 16 0.2v audio level comparator and nrz comparator inputs. the filter circuit output is connected. g n d v c c 7 2 1 6 7 2 g n d 1 0 0 k 2 0 k 1 8 g n d v c c 7 2 2 1 g n d v c c 7 8 k 2 2 2 2 k 1 k
? 5 CXA3117AN pin no. 24 1.4v mix in mixer input. symbol pin voltage equivalent circuit description g n d v c c 4 . 1 6 k 2 k 4 . 1 6 k 2 4 electrical characteristics (v cc = 1.4v, ta = 25 c, fs = 21.7mhz, f mod = 1.6khz, f dev = 4.8khz, am mod = 30%) item current consumption current consumption am rejection ratio nrz output saturation voltage nrz output leak current nrz hysteresis width vb output current vb output saturation voltage reg out voltage lva operating voltage lva output leak current lva output saturation voltage detector output voltage logic input voltage high level logic input voltage low level limiting sensitivity detector output level ratio deviation to level comparator window width level comparator output saturation voltage level comparator output leak current rssi output offset mixer input resistance mixer output resistance if limiter input resistance i cc i ccs amrr v satnrz i lnrz v twnrz i out v satvb v reg v lva i llva v satlva v odet v thbsv v tlbsv v in (lim) v lcwr v satlc i llc v orssi r inlim r outmix r inlim measurement circuit 1, v2 = 1.0v measurement circuit 1, v2 = 0v measurement circuit 2, 30k lpf measurement circuit 4, vin = 0.3v measurement circuit 3, vin = 0.1v measurement circuit 3, vin = 0.1 to 0.3v measurement circuit 5 measurement circuit 5 output current 0 a measurement circuit 6, v1 = 1.4 to 1.0v measurement circuit 6, v1 = 1.0v measurement circuit 7 measurement circuit 2 measurement circuit 2, data filter fc = 2.4khz when pin 6 is shorted to vcc measurement circuit 9 measurement circuit 8 measurement circuit 10 0.7 25 0 100 0.95 1.05 50 0.9 ?5 1.6 1.2 1.2 1.1 6 10 1.00 1.10 63 ?08 0 150 2.0 1.5 1.5 1.35 10 0.4 5.0 20 0.4 1.05 1.15 5.0 0.4 80 0.35 +15 0.4 5.0 300 2.4 1.8 1.8 ma a db v a mv a v v v a v mvrms v v dbm % v a mv k k k symbol conditions min. typ. max. unit
? 6 CXA3117AN v 2 v 1 1 . 4 v 2 3 4 5 6 7 9 1 0 1 1 1 2 1 1 3 1 4 1 5 1 6 1 7 1 8 2 0 2 1 2 2 2 3 2 4 v c c 8 1 9 1 0 0 0 p 1 . 8 1 0 p t o 1 2 0 p v i n v 2 1 v 1 2 0 0 p 1 2 0 0 p 8 . 2 k 1 2 0 0 p 1 v 1 1 . 4 v 2 2 p 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 1 5 p v c c measurement circuit 1 measurement circuit 2 v 2 1 v v 1 1 . 4 v 2 3 4 5 6 7 9 1 0 1 1 1 2 1 1 3 1 4 1 5 1 6 1 7 1 8 2 0 2 1 2 2 2 3 2 4 v c c v i n 8 1 9 1 0 0 k v 2 1 v v 1 1 . 4 v 2 3 4 5 6 7 9 1 0 1 1 1 2 1 1 3 1 4 1 5 1 6 1 7 1 8 2 0 2 1 2 2 2 3 2 4 v c c v i n 8 1 9 5 0 a measurement circuit 3 measurement circuit 4 electrical characteristics measurement circuit
? 7 CXA3117AN v 3 0 . 5 v v 2 1 v v 1 1 . 4 v 2 3 4 5 6 7 9 1 0 1 1 1 2 1 1 3 1 4 1 5 1 6 1 7 1 8 2 2 2 3 2 4 v c c 1 9 1 0 0 a 2 0 8 g n d g n d 2 1 v 2 1 v v 1 1 . 4 t o 1 . 0 v 2 3 4 5 6 7 9 1 0 1 1 1 2 1 1 3 1 4 1 5 1 6 1 7 1 8 2 1 2 2 2 3 2 4 v c c 1 9 1 0 0 k 2 0 8 measurement circuit 5 measurement circuit 6 v 2 1 v v 1 1 . 4 v 2 3 4 5 6 7 9 1 0 1 1 1 2 1 1 3 1 4 1 5 1 6 1 7 1 8 2 1 2 2 2 3 2 4 v c c 1 9 5 0 a 2 0 8 v i n 0 . 2 v v 2 1 v v 1 1 . 4 v 2 3 4 5 6 7 9 1 0 1 1 1 2 1 1 3 1 4 1 6 1 7 1 8 2 1 2 2 2 3 2 4 v c c 1 9 2 0 8 1 5 1 0 0 k measurement circuit 7 measurement circuit 8 v i n 0 . 1 v v 2 1 v v 1 1 . 4 v 2 3 4 5 6 7 9 1 0 1 1 1 2 1 1 3 1 4 1 6 1 7 1 8 2 1 2 2 2 3 2 4 v c c 1 9 2 0 8 1 5 5 0 a v 2 1 v v 1 1 . 4 v 2 3 4 5 6 7 9 1 0 1 1 1 2 1 1 4 1 5 1 6 1 7 1 8 2 0 2 1 2 2 2 3 2 4 v c c 8 1 9 1 3 1 0 0 p measurement circuit 9 measurement circuit 10
? 8 CXA3117AN o s c i f _ l i m f i l t e r m i x q u a d _ d e t l e v e l c o m p r e g r s s i c h a r g e g n d l v a v b _ r e g n r z _ c o m p c h a r g e b s a u d i o l . c . o u t c h g _ o f f f i l _ s w v c c g n d 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 a u d i o r s s i l e v e l n r z l v a r e g g n d g n d c 1 1 0 p t o 1 2 0 p l 1 1 . 8 h c 3 1 0 0 0 p g n d c 6 1 0 g n d p n p r 4 2 2 0 c 9 0 . 0 1 g n d r 5 1 0 0 k r 6 1 0 0 k g n d g n d g n d s 4 s 3 r 8 1 0 0 k s 2 g n d c 1 4 1 0 0 p g n d s 1 c 1 3 1 4 2 0 p ( 1 2 0 0 p + 2 2 0 p ) r 7 6 . 8 k g n d c 1 2 6 8 0 p c 1 1 1 1 0 0 p ( 1 0 0 p + 1 0 0 0 p ) g n d d i s c g n d c 1 0 1 c e r a f i l c 8 0 . 0 1 c 7 1 0 g n d c 5 1 5 p c 4 2 2 p x t a l r f s m a application circuit application circuits shown are typical examples illustrating the operation of the devices. sony cannot assume responsibility fo r any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same .
? 9 CXA3117AN application note 1) power supply the CXA3117AN, with the built-in regulator, is designed to permit stable operation at the wide range of supply voltage from 1.1 to 4.0v. decouple the wiring to v cc (pin 4) as close to the pin as possible. 2) oscillator input oscillator input method a) using pins 1 and 2, input self-excited oscillation signal through the composition of a colpitts type crystal oscillator circuit. connect the capacitors attached to the crystal and pin 2 to v cc . b) directly input a local oscillation signal to pin 1. 2 3 1 v c c c e r a m i c f i l t e r 2 3 1 f r o m l o c a l s i g n a l c e r a m i c f i l t e r fig. 1 3) mixer the mixer is of double-balance type. pin 24 is the input pin. input though a suitable matching circuit. the input impedance is 2.0k . pin 3 serves as the output pin for the mixer, and a load resistance of 1.5k is incorporated. 4) if filter the filter to be connected between this mixer output and the if limiter amplifier input should have the following specifications. connect the ground pin of the if filter to v cc . i/o impedance : 1.5k 10% bandwidth : changes according to applications. 5) if limiter amplifier the gain of this if limiter amplifier is approximately 100db. take notice of the following points in making connection to the if limiter amplifier input pin (pin 5). a) wiring to the if limiter amplifier input (pin 5) should be as short as possible. b) as the if limiter amplifier output appears at quad (pin 8), wiring to the ceramic discriminator connected to quad should be as short as possible to reduce the interference with the mixer output and if limiter amplifier input. v c c w i r e a s s h o r t a n d a p a r t a s p o s s i b l e a s s h o r t a s p o s s i b l e 3 4 5 6 7 8 9 fig. 2
? 10 CXA3117AN 6) quick charge in order to hasten the rising time from when power is turned on, the CXA3117AN features a quick charge circuit. therefore, the quick charge circuit eliminates the need to insert a capacitor between the detector output and the lpf as is the case with conventional ics, but a capacitor should be connected to pin 7 to determine the average signal level during steady-state reception. the capacitance value connected to pin 7 should be chosen such that the voltage does not vary much due to discharge during battery saving. connect a signal for controlling the quick charge circuit to pin 18. setting this pin high enables the quick charge mode, and setting this pin low enables the steady-state reception mode. quick charge is used when the power supply is turned on. the battery saving must be set high at the time. connect pin 18 to gnd when quick charge is not being used. p o w e r s u p p l y t o t h e i c ( p i n 4 ) q u i c k c h a r g e ( p i n 1 8 ) b a t t e r y s a v i n g c o n t r o l ( p i n 1 7 ) a 5 m s t 2 t 1 t 3 t 4 a a 1 m s 1 m s fig. 3 example when the pin 7 ref capacitance value is 1 f t1 in fig. 3: 2-level data setting time after quick charge when the input frequency offset is within 4.8khz: 0ms t2 in fig. 3: 4-level data setting time after quick charge when the input frequency offset is within 1.6khz or less: 0ms when the input frequency offset is within 3khz or less: 500ms or less t3 in fig. 3: 4-level data is obtained t4 in fig. 3: 2-level data is obtained
? 11 CXA3117AN 7) detector the detector is of quadrature type. to perform phase shift, connect a ceramic discriminator to pin 8. the phase shifting capacitor for the quadrature detector is incorporated. the fm (fsk) signal demodulated with the detector is output to audio (pin 16) through the internal primary lpf. the audio output is the anti-phase output to the nrz out. the cdbm455c50 (murata mfg. co., ltd.) ceramic discriminator is recommended for the CXA3117AN. for the 2-level system, the cdbm455c28 can also be used. 6 . 8 k 7 8 9 v c c c e r a m i c d i s c r i m i n a t o r c d b m 4 5 5 c 5 0 fig. 4 the detector output level is changed according to the resistance value connected to pin 8. 8) filter buffer, level comparator and nrz comparator the lpf circuit is built in this ic. the lpf output is connected internally to the nrz comparator, level comparator and quick charge circuit. 0 . 2 v 1 5 1 6 1 9 7 l . c . l p f d e t using the lpf, remove noise from the demodulated signal and input the signal to the above three circuits. fig. 5
? 12 CXA3117AN 8)-1. lpf constant the data filter cut-off (fc) is expressed with the following equation. fc 1 = fc 2 = , q = c 11 to c 13 : external capacitance (pin 9 to pin 11) r: ic internal resistance r is approximately 55k 20% when pin 12 is low. the table below shows the example of constants to data rate. 2 c 11 r 1 pin 12 filter switch h l h l h l h l 430 950 1900 1000 2000 1000 2000 512bps (2 levels) 1200bps (2 levels) 2400bps (2 levels) 1600bps (2 levels) 3200bps (2 levels) 3200bps (4 levels) 6400bps (4 levels) capacitance (pf) 6800 1500 pin 9 1100 pin 10 680 pin 11 1420 pin 9 1100 pin 10 680 pin 11 1420 fc (hz) data rate 8)-2. comparator output the level comparator and the nrz comparator shape the waveform of this input signal and output it as a square wave. the comparator output stage is for open collector. thus, if the cpu is of cmos type and the supply voltage is different, a direct interface as illustrated in the figure below can be implemented. c m o s i c 1 9 4 c m o s p o w e r s u p p l y v c c 1 . 4 v v c c ( 1 5 ) c o m p a r a t o r o u t p u t fig. 6 c 13 c 12 2 1 c 12 c 13 r 2 1
? 13 CXA3117AN 9) reg cont controls the base bias of the external transistors. 10) lva out this pin goes high (open) when the supply voltage becomes low. since the output is an open collector, it can be used to directly drive cmos device. the setting voltage of the lva is 1.10v (typ.), and it possesses a hysteresis with respect to the supply voltage. the hysteresis width is 10mv (typ.). 11) b.s. operation of the CXA3117AN can be halted by setting this pin low. this pin can be connected directly to cmos device. the current consumption during battery saving is 10 a or less (at 1.4v). b . s . 1 7 fig. 7 8)-3. level comparator output the level comparator characteristics are as shown in the figure below. therefore, a high signal is output at the bit border even if the input signal is a 4.8khz signal. this high output interval varies according to the frequency response of the bit rate filter, and widens as the cut-off frequency becomes lower. the decoder avoids this high interval when processing data. i n p u t s i g n a l l e v e l c o m p a r a t o r o u t p u t f 0 + 1 . 6 + 4 . 8 1 . 6 4 . 8 l h i n p u t f r e q u e n c y d e v i a t i o n [ k h z ] o u t p u t
? 14 CXA3117AN 12) m-ary (m = 2- or 4-level) fsk demodulation system 12)-1. output waveform polarity discrimination output and msb comparator output are used to demodulate the 4-level waveform shown below. [4-level fsk demodulating waveform] 0 1 0 0 1 0 1 1 0 1 1 0 0 0 + 4 . 8 k h z + 1 . 6 k h z 1 . 6 k h z 4 . 8 k h z [nrz out] polarity discrimination output (when the input frequency is higher than the local frequency) 0 0 1 1 0 1 0 p o s n e g [l.c. out] msb comparator output 1 0 0 1 1 0 0 1 . 6 k h z 4 . 8 k h z the 4-level fsk demodulating data is divided into an nrz out and l.c. out shown above. here, the nrz out corresponds to a conventional nrz comparator output. the l.c. out is made comparing the demodulated waveform amplitude to the ic internal reference voltage levels. when the threshold value of l.c. out is not appropriate to the detector output, the resistance value on pin 8 should be varied for the detector output level adjustment or the resistor should be inserted between pin 6 and v cc for the level comparator threshold value adjustment. for the 2-level fsk demodulation, it corresponds to a conventional nrz comparator output. 6 r v c c (the polarity can be inverted by setting the local frequency higer than the input frequency.)
? 15 CXA3117AN 12)-2. 4-level signal and threshold value for sony pager ics, the demodulated signal is optimally matched to the nrz comparator threshold value by the curve correction operation described in 13) as shown in the figure below. (operation point correction using a feedback loop filter) o f f s e t c o r r e c t i o n c i r c u i t d e t e c t o r o u t p u t l e v e l c o m p a r a t o r 1 n r z c o m p a r a t o r l e v e l c o m p a r a t o r 2 o p e r a t i o n p o i n t c o r r e c t i o n ( t h e c o m p a r a t o r t h r e s h o l d v a l u e i s f i x e d . ) the level comparator threshold value can be adjusted by varying the detector output level, which is achieved by varying the discriminator dumping resistance. (ac gain adjustment) l e v e l c o m p a r a t o r t h r e s h o l d v a l u e 1 n r z t h r e s h o l d v a l u e = d e m o d u l a t e d s i g n a l a v e r a g e v o l t a g e l e v e l c o m p a r a t o r t h r e s h o l d v a l u e 2 a c g a i n a d j u s t m e n t
? 16 CXA3117AN 12)-3. offset amount and threshold value immediately after power-on when the ref capacitor is not charged with the correction voltage, if the input frequency has an offset, some time is required to correct this offset. in addition, the times required to obtain 2-level and 4-level data differ according to the offset amount. a) 2-level signals in the case of 2-level signals, correct data is obtained when the offset amount is smaller than the detector output amplitude. this is 75mv or less when the detector output level is 150mvp-p which corresponds to within 4.8khz when converted to a frequency by the s curve. thus, 2-level data is obtained without an operation point correction time lag when the frequency offset is within 4.8khz. b) 4-level signals in the case of 4-level signals, correct data is obtained when the offset amount is less than 1/3 of the detector output amplitude (during 4.8khz dev). this is 25mv or less when the detector output level is 150mvp-p which corresponds to 1.6khz or less when converted to a frequency by the s curve, . thus, 4- level data is obtained without an operation point correction time lag when the frequency offset is within 1.6khz. as shown above, 4-level signals have an allowable offset range 1/3 that of 2-level signals. when the offset exceeds this allowable range, time is required to determine the operation point and obtain correct data through feedback. also, even if the offset is within the allowable range, the output pulse duty changes until the offset is 0. n r z t h r e s h o l d v a l u e o f f s e t n r z t h r e s h o l d v a l u e o f f s e t l e v e l c o m p a r a t o r t h r e s h o l d v a l u e 2 l e v e l c o m p a r a t o r t h r e s h o l d v a l u e 1
? 17 CXA3117AN 13) principle of quick charge operation buf in fig. 8 is the detector buffer amplifier and comp is the level comparator or the nrz comparator. the CXA3117AN has a feedback loop from the comparator input to the input circuit of the detector output buffer. this equalizes the average value of the comparator input voltage to the reference voltage, with the quick charge circuit of chg being set in the feedback loop. switching the current of the quick charge circuit enables reduction of the rise time. in this block, chg is a comparator which compares input voltages and outputs a current based on this comparison. the current on chg is switched between high and low at pin 18. when the power is turned on, switch the current to high to increase the charge current at c in fig. 8 and shorten the time constant. during steady-state reception mode, switch the current to low, lengthening the charge time constant and allowing for stable data retrieval. also, controlling pin 14 can make the current off. this is effective when the same data are received continuously. 7 c o m p 1 6 1 9 l p f c r e f e r e n c e v o l t a g e c h g b u f a u d i o f s k r e f fig. 8 13)-1. slow charge mode , quick charge mode during slow charge mode and quick charge mode, if the rf system frequency is deviated, etc., and the demodulated output has an offset voltage, feedback is applied to correct this offset voltage. here, feedback is applied so that the average value of the audio output voltage matches the internal regulator voltage. this feedback shifts the s curve up and down in a parallel manner. s c u r v e o f f s e t r e f e r e n c e v o l t a g e f 0 i n p u t s i g n a l w h e n t h e r f s y s t e m f r e q u e n c y i s d e v i a t e d , t h e r e i s n o c o r r e c t i o n s o a n o f f s e t o c c u r s . s c u r v e r e f e r e n c e v o l t a g e d u r i n g s l o w c h a r g e m o d e , t h e s c u r v e s h i f t s t o c o r r e c t t h e o f f s e t . f 0 i n p u t s i g n a l
16) misoperation prevention function for continuous data the offset to the comparator threshold value of the detector output is canceled with the feedback loop indicated in the paragraph 13). this operation assumes that ??and ??are in equal numbers in the data. the offset is occurred when the ??or ??data are received continuously. in this case, setting pin 14 high to make the charge current off prevents the offset occurrence. without using this function, the stability for the same data continuously received depends on the capacitance value on pin 7 shown in the paragraph 13). when this capacitance value is increased, the data is demodulated more stably; however, it takes more time for the ic to rise. if this function is not used, be sure to connect pin 14 to gnd. r e c e p t i o n s i g n a l c h g o f f ( p i n 1 4 ) h l s y n c p a r t d a t a s y n c p a r t d a t a fig. 9 ? 18 CXA3117AN 14) s curve characteristics even if the if in input signal frequency is deviated, the feedback is applied to the audio operating point so as to match it to the comparator reference voltage by the quick charge operation shown in fig. 8. therefore, this feedback must be halted in order to evaluate the s curve characteristics. to execute the evaluation, measure the average voltage on pin 16 first and input this voltage to pin 7 from the external power supply. 15) control pins the function controls are as shown below. pin no. symbal function input high input low 12 fil sw data filter cut-off control fc: low fc: high * 14 chg off pin 7 charge current control slow charge off slow charge operation * 17 b.s. battery saving mode control ic operation * sleep 18 charge pin 7 charge speed control quick charge slow charge * note) pin 14 control should be performed with pin 18 low. when each function is not controlled externally, set it to the state with an asterisk ( * ).
? 19 CXA3117AN 17) ref capacitance value and charge time, hold time the ref capacitance is the feedback loop time constant of the s curve. this determines the detector output low frequency cut-off, ic rise characteristics and operating voltage hold characteristics during battery saving. when the ref capacitance is reduced: 1. the detector output low frequency cut-off becomes higher. 2. the ic rise characteristics become faster. 3. the operating voltage hold characteristics during battery saving become shorter. of these, 1 has little effect on fsk, so a capacitance value that matches the used system should be selected in consideration of 2 and 3. 17)-1. example of ic rise characteristics immediately after power-on 17)-2. example of operating voltage hold characteristics when the ref capacitance is 1 f, the s curve hold voltage variation is a value that has no effect on the rise of the 4-level data after 5 minutes of battery saving as shown below. offset voltage after 5 minutes of battery saving: 10mv or less 1 . 0 0 . 5 0 3 f 0 + 3 w h e n t h e r e f c a p a c i t a n c e i s 1 f [ k h z ] [ s ] o f f s e t f r e q u e n c y a n d t 2 ( a f t e r p o w e r - o n u n t i l 4 - l e v e l d a t a i s o b t a i n e d )
? 20 CXA3117AN 18) sensitivity adjustment method the constants shown in the application circuit diagram are for the standard external parts. however, adjustment may be necessary depending on the conditions of use, characteristics of external parts, and the rf system circuit and decoder connected to the if ic, etc. adjust the sensitivity according to the following procedures. a) mix in matching when using a matching circuit between the rf system circuit and mix in of the cxa3117n, adjust the trimmer to obtain the optimal sensitivity while monitoring the audio output. b) local input level the mixer circuit gain is dependent on the local signal input level to osc in. the input level to osc in should be set as high as possible within the range of ? to +2dbm as shown in the graph of "local input level vs. mixer gain characteristics". however, care should be taken as raising the input level above +2dbm will cause the sensitivity to drop. when creating the local signal using the internal oscillator circuit, the oscillation level varies according to the external capacitances attached to pins 1 and 2 and the characteristics of the used crystal. therefore, be sure to adjust the external capacitance values attached to pins 1 and 2 according to the crystal characteristics. c 1 and c 2 have the following range in the figure above. c 1 3 c 2 c 1 = c 2 to c 1 = 5c 2 as for the ratio of c 1 to c 2 , the oscillation stabilizes as c 1 approaches equality with c 2 . the oscillation level decreases as the c 1 and c 2 values become larger, and increases as the c 1 and c 2 values become smaller. use a fet probe to confirm the local input level. c) lpf constant the data filter cut-off may need to be changed depending on the characteristics of the connected decoder. adjust the capacitance values of pins 9 to 12 while checking the incoming sensitivity including the decoder. if the capacitance values are too large, the detector output waveform will deviate at high data rates, causing the sensitivity to drop. conversely, if the capacitance values are too small, the lpf will be easily affected by noise, causing the sensitivity to drop. adjust capacitance values of pins 9 to 12 so that the capacitance value described in "16) lpf constant" becomes smaller. 2 1 o s c v c c c 1 c 2
? 21 CXA3117AN d) detector output level the nrz comparator and level comparator threshold values are fixed for the CXA3117AN. in the case of 4- level signals, the relationship between the level comparator threshold value and the detector output level affects the sensitivity. the detector output level can be adjusted by the resistance attached to pin 8. increasing the resistance value also increases the output level, and vice versa. the pin 8 resistance value differs according to the ceramic discriminator attached to pin 8. when the discriminator is changed to a different type, the resistance value must be adjusted. adjust the resistance value while monitoring the level comparator output waveform or the sensitivity including the decoder. e) quick charge circuit the CXA3117AN has a feedback circuit that corrects the detector output operation point in order to correct the if frequency deviation. when the if frequency deviation amount is large, correction takes time and may lower the sensitivity. adjust the oscillator frequency of the local oscillator so that the center frequency of the signal input to pin 5 (if in) is as close to 455khz as possible. 19) CXA3117AN standard board description outline this board contains the external parts shown in the application circuit in order to evaluate CXA3117AN operation. features the following CXA3117AN basic operations can be checked. 1) varying the data filter cut-off 2) battery saving and other mode switching 3) nrz output and level comparator output pins method of use 1) input the CXA3117AN supply voltage vcc = 1.4v. the CXA3117AN operates with a single power supply. 2) the CXA3117AN uses a 21.245khz crystal. input the rf signal from the rf pin and use the CXA3117AN in the condition where if = 455khz. 3) set the mode switches. mode switch setting mode switches s1, s2, s3 and s4 are provided in four locations in the board. each basic operation can be confirmed by switching these mode switches while referring to the board layout. see the table in 15) control pins for the mode switching. device specifications see these specifications for the ic specifications. the ics for this evaluation board are es specification. circuit diagram the circuit diagram is the same as the application circuit diagram in these specifications.
? 22 CXA3117AN 19)-1. standard board layout 1 1 2 2 4 1 3 v c c g n d d i s c x t a l c e r a f i l s 1 s 2 s 3 s 4 p n p r f 3 1 1 7 e v a l u a t i o n b o a r d 19)-2. mode switch description s 4 s l o w c h a r g e l o w h i g h q u i c k c h a r g e c h a r g e s 3 s l e e p l h i c o p e r a t i o n b . s . s 2 s l o w c h a r g e o p e r a t i o n l h s l o w c h a r g e o f f c h g - o f f f c : h i g h l h f c : l o w f i l s w s 1
? 23 CXA3117AN 19)-3. list of standard board parts value part# remarks (manufacture) note inductor 1.8 h l1 el0405 (tdk products) e12 series 2.5mm pitch (lead pitch) active component pnp 2sa1015 (toshiba corporation) crystal 21.245mhz xtal kss 2b (kinseki, ltd.) resistor 220 8.7k 100k r4 r7 r5 r6 r8 (river) e12 series 1/8w capacitor 10 to 120p 15p 22p 100p 1000p 1200p 0.01 1 10 c1 c5 c4 c14 c3 c11 c12 c13 c8 c9 c10 c6 c7 tz03p450fr169 (murata products) trimmer capacitor dd100 series temperature characteristics type b (murata products) ceramic capacitor e12 series (high dielectric constant type) 25v 1 (shin-ei tushin kogyo co., ltd.) 25v 10 (shin-ei tushin kogyo co., ltd.) electrolytic capacitor e6 series
? 24 CXA3117AN ceramic filter cerafil cfws455d (murata products) 455khz 1.5k ceramic discriminator disc cdbm455c50 (murata products) 455khz switch s1, s2, s3, s4 ate1d-2m3-10 (fujisoku corporation) on ?on (1 poles) connector rf hrm300-25 (hirose electric co., ltd.) sma connector pin 2 6 mac 8 test pin st-1-3 (mac eight) l = 10mm 0.8 f mac 8 test pin lc-2-g (mac eight)
? 25 CXA3117AN m i x e r i / o c h a r a c t e r i s t i c s a n d 3 r d i n t e r c e p t p o i n t m i x e r i n p u t l e v e l [ d b m ] o u t p u t l e v e l [ d b m ] 6 0 8 0 7 0 6 0 5 0 4 0 3 0 2 0 5 0 4 0 3 0 2 0 1 0 0 f o f 1 + f 2 c u r r e n t c o n s u m p t i o n c h a r a c t e r i s t i c s s u p p l y v o l t a g e [ v ] 1 . 0 2 . 0 3 . 0 4 . 0 0 . 9 1 . 0 1 . 1 1 . 2 1 . 3 1 . 4 c u r r e n t c o n s u m p t i o n [ m a ] m i x e r i n p u t a u d i o r e s p o n s e a n d r s s i c h a r a c t e r i s t i c s m i x e r i n p u t l e v e l [ d b m ] 1 2 0 6 0 5 0 4 0 3 0 2 0 1 0 0 1 1 0 1 0 0 9 0 8 0 7 0 6 0 5 0 4 0 3 0 2 0 a u d i o r e s p o n s e [ d b ] r s s i [ m v ] 0 2 0 0 4 0 0 6 0 0 8 0 0 1 0 0 0 s / n s + n + d r f 2 1 . 7 m h z l o c a l 2 1 . 2 4 5 m h z 6 d b m a u d i o 1 . 6 k h z c w d e v . 4 . 8 k h z 0 d b = 6 3 . 1 m v r m s v c c = 1 . 4 v t = 2 5 c r s s i f o = 2 1 . 7 m h z f l o = 2 1 . 2 4 5 m h z 6 d b m f 1 = 2 1 . 7 2 5 m h z f 2 = 2 1 . 7 5 0 m h z t h e i / o l e v e l i s f o r t h e v a l u e s r e a d a t i / o p i n w i t h t h e s p e c t r u m a n a l y z e r example of representative characteristics
? 26 CXA3117AN v a r i a b l e c u t - o f f c h a r a c t e r i s t i c s o f a u d i o f i l t e r r e s p o n s e [ d b ] i n p u t f r e q u e n c y [ h z ] 1 0 0 6 0 2 0 0 5 0 0 1 k 2 k 5 k 1 0 k 5 0 4 0 3 0 2 0 1 0 0 p i n 1 2 v o l t a g e l h l o c a l i n p u t l e v e l v s . m i x e r g a i n c h a r a c t e r i s t i c s l o c a l i n p u t l e v e l [ d b m ] 2 0 5 1 5 1 0 5 0 5 0 5 1 0 m i x e r g a i n [ d b ] f r f 2 1 . 7 m h z 6 0 d b m f l o 2 1 . 2 4 5 m h z 1 5 0 0 . 0 1 l e v e l c o m p a r a t o r c h a r a c t e r i s t i c s c o m p a r a t o r i n p u t v o l t a g e [ m v ] c o m p a r a t o r o u t p u t v o l t a g e [ m v ] 1 5 0 0 . 2 0 0 . 6 0 . 4 1 . 0 0 . 8 1 . 4 1 . 2 2 0 0 2 5 0 3 0 0 1 . 6 1 . 8 2 . 0
? 27 CXA3117AN l v a c h a r a c t e r i s t i c s s u p p l y v o l t a g e [ v ] 1 . 0 5 0 l v a c o m p a r a t o r o u t p u t v o l t a g e [ v ] 0 . 2 0 . 4 0 . 6 0 . 8 1 . 0 1 . 2 1 . 2 0 1 . 1 5 1 . 1 0 n r z c o m p a r a t o r c h a r a c t e r i s t i c s c o m p a r a t o r i n p u t v o l t a g e [ m v ] 1 6 0 0 c o m p a r a t o r o u t p u t v o l t a g e [ v ] 1 8 0 0 . 2 0 . 4 0 . 6 0 . 8 1 . 0 1 . 2 1 . 4 1 . 6 2 0 0 2 2 0 2 4 0 2 6 0 p i n 6 c u r r e n t [ a ] 0 1 0 0 l e v e l c o m p a r a t o r t h r e s h o l d v a l u e [ m v ] 0 . 5 1 . 0 1 . 5 2 . 0 2 . 5 3 . 0 1 5 0 2 0 0 2 5 0 3 0 0 2 1 0 l e v e l c o m p a r a t o r t h r e s h o l d v a l u e c o n t r o l c h a r a c t e r i s t i c s ( o u t p u t l o w h i g h s w i t c h i n g l e v e l ) r e p r e s e n t a t i v e e x a m p l e u s i n g t y p i c a l s a m p l e t y p i c a l v a l u e w h e n p i n 6 i s s h o r t e d t o v c c
? 28 CXA3117AN r f i n p u t l e v e l [ d b m ] r s s i o u t p u t v o l t a g e t e m p e r a t u r e c h a r a c t e r i s t i c s r s s i o u t p u t v o l t a g e c h a r a c t e r i s t i c s [ m v ] 1 2 0 1 0 0 1 1 0 1 0 0 9 0 8 0 7 0 6 0 5 0 4 0 3 0 2 0 2 0 0 3 0 0 4 0 0 5 0 0 6 0 0 7 0 0 8 0 0 2 0 c 0 c 2 5 c 5 0 c 7 5 c : : : : : q u i c k c h a r g e c i r c u i t o u t p u t c u r r e n t c h a r a c t e r i s t i c s p i n 1 1 i n p u t p i n 1 6 v o l t a g e [ m v ] 8 0 1 2 0 1 6 0 2 0 0 2 4 0 2 8 0 3 2 0 3 6 0 0 . 5 0 . 3 0 0 . 3 0 . 5 s l o w c u r r e n t [ a ] 5 0 3 0 0 3 0 5 0 f a s t c u r r e n t [ a ] f a s t m o d e s l o w m o d e o n s l o w m o d e o f f p i n 7 2 1 5 m v f i x e d
? 29 CXA3117AN d e t e c t o r o u t p u t l e v e l a n d l e v e l c o m p a r a t o r t h r e s h o l d v a l u e v s . t e m p e r a t u r e c h a r a c t e r i s t i c s d e t e c t o r o u t p u t l e v e l a n d l e v e l c o m p a r a t o r t h r e s h o l d v a l u e [ m v ] 1 0 0 5 0 0 5 0 1 0 0 4 . 8 k h z d e v . d e t e c t o r o u t p u t l e v e l l e v e l c o m p a r a t o r t h r e s h o l d v a l u e f o r p o s i t i v e s i d e 1 . 6 k h z d e v . d e t e c t o r o u t p u t l e v e l l e v e l c o m p a r a t o r t h r e s h o l d v a l u e f o r n e g a t i v e s i d e t e m p e r a t u r e [ c ] 2 0 0 2 5 5 0 7 5 : h l : l h
? 30 CXA3117AN package outline unit: mm s o n y c o d e e i a j c o d e j e d e c c o d e s s o p - 2 4 p - l 0 1 s s o p 0 2 4 - p - 0 0 5 6 p a c k a g e m a t e r i a l l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e m a s s e p o x y r e s i n s o l d e r / p a l l a d i u m 4 2 / c o p p e r a l l o y p a c k a g e s t r u c t u r e p l a t i n g 0 . 1 g 2 4 p i n s s o p ( p l a s t i c ) 0 . 1 0 . 1 0 t o 1 0 0 . 5 0 . 2 d e t a i l a * 5 . 6 0 . 1 2 4 * 7 . 8 0 . 1 1 3 0 . 6 5 1 2 1 7 . 6 0 . 2 0 . 1 1 . 2 5 0 . 1 + 0 . 2 a 0 . 1 3 m n o t e : d i m e n s i o n * d o e s n o t i n c l u d e m o l d p r o t r u s i o n . b = 0 . 2 2 0 . 0 5 + 0 . 1 0 . 1 5 0 . 0 2 + 0 . 0 5 ( 0 . 2 2 ) ( 0 . 1 5 ) 0 . 1 5 0 . 0 1 d e t a i l b : s o l d e r d e t a i l b : p a l l a d i u m + 0 . 0 3 b = 0 . 2 2 0 . 0 3 b b n o t e : p a l l a d i u m p l a t i n g t h i s p r o d u c t u s e s s - p d p p f ( s o n y s p e c . - p a l l a d i u m p r e - p l a t e d l e a d f r a m e ) .


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